How to identify chip packages

A chip package is what surrounds the integrated circuit die and connects the die's pads to the packages external pins. They are often a chip carriers, or IC packages.

Types of Leads/Contacts

The pieces of metal that electrically connect the IC to a circuit board are called leads.

J-Lead	Gull-wing	C-Bend
I-Lead	Bat-wing	DIP Through-Hole
Exposed Pad	Ball (solder ball)	Tab (Heatsink)
Land pad (Non-leaded/No-lead)	PGA Pin	Column

Common Packages

• CPGA: Ceramic pin grid array
• PDIP: Plastic dual in-line package
• BGA : Ball grid array
• SO: Small outline
  • SOIC: Small outline integrated circuit
  • SOT: Small outline transistor
  • SOJ: Small outline J-lead
• PQFP: Plastic quad flat package
• PLCC: plastic leaded chip carrier
• TO: transistor outline

Chip packages

• In-line package
  • DIP
  • SIP
  • ZIP

• Optical package
  • Photodiode
  • LED
  • IR
  • Photo interrupt

• Pin grid array
  • PGA

• Small outline package:
  • SO
  • SOP
  • SOIC
  • SOT
  • SC

• Transistor outline
  • TO

• Ball grid array
  • BGA
  • CSP
  • Micro-array
  • MicroSMD
  • CGA: Column grid array

• Quad package
  • QFP
  • HQFP

• Leadless package
  • QFN
  • SON
  • LGA

• J-lead package
  • SOJ
  • LCC

• 2 lead package
  • Diodes
    • DO
    • SOD
  • Resistors
  • Capacitors
  • inductors

• I-lead package
  • CERPACK
  • CERQUAD
  • QFI
  • SOI

• Non-standard

• Unsorted

See all chip package images: Category:Chip package image

Chip Carrier Related Acronyms

• COL: Chip-on-Lead
• TEP: Top Exposed Pad
• EP, EXP: Exposed pad
• L, LD: Lead
• SiP: System in Package
• JEDEC: Joint Electron Device Engineering Council
• JEITA: Japan Electronics and Information Technology Industries Association
• SoC: System on Chip
• ASIC: Application specific Integrated circuit
• Pb: lead
• Sn: tin
• Cu: Copper
• Au: Gold
• EIA: Electronic Industries Alliance
• MCP: Multi-Chip Package
• EIAJ: Electronic Industries Association of Japan
• TAB: Tape Automated Bonding

See Also

• Guide to computer chip or integrated circuit identification

External Links

• JEITA package standards downloads
• http://www.standardics.nxp.com/packaging/package.outlines/
• http://www.nxp.com/package/
• http://www.analog.com/en/corporate/quality-and-reliability/packages/index.html
• http://www.amkor.com/products/productfamilies.cfm

• http://acronyms.thefreedictionary.com/

New links

• some chip package desc
• GOOD: [1]
• [2]
• ALL ee words: chip-abbreviations
• package names

• Package in package

• Bumped Chip Carrier (BCC)

• http://www.educypedia.be/electronics/componentfabricationchip.htm
• package photos

• NEC
• Intersil
• ROHM
• Sony
• TI- long list of names
• some names
• SMD components
• http://www.fpga-guide.com/package/package.html
• SMD Dictionary
• BGA Packages
• very long list of names
• list of names (Spanish)
• BGA side profiles
• BGA side profiles
• BGA side profiles

completed

• Analog devices
• Amkor Technology
• Fairchild

• old packages
  
  
  From HowTo Wiki, a Wikia wiki.