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This page contains all [[computer chip]] or [[integrated circuit]] packages. A [[chip package]] is what surrounds the [[integrated circuit die]] and connects the die's pads to the packages external pins.
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A [[chip package]] is what surrounds the [[integrated circuit die]] and connects the die's pads to the packages external pins. They are often a chip carriers, or IC packages.
   
   
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=Types of Leads/Contacts=
  
=Types of Leads/Contacts=
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The pieces of metal that electrically connect the IC to a circuit board are called leads.
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* J-Lead
  
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* Gull-wing Lead
  
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{|
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* C-Bend Lead
  
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| [[Image:Ic leads-j-lead.png|thumb|none|100px|J-Lead]]
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* I-Lead
  
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| [[Image:Ic leads-gull wing.png|thumb|none|100px|Gull-wing]]
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* Bat-wing Lead
  
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| [[Image:Ic leads-c lead.png|thumb|none|100px|C-Bend]]
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* Through-Hole Lead
  
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|-
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* Exposed Pad
  
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| [[Image:Ic leads-i lead.png|thumb|none|100px|I-Lead]]
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* Ball (solder ball)
  
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| [[Image:Ic leads-batwing.png|thumb|none|100px|Bat-wing ]]
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* Tab (Heatsink)
  
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| [[Image:Ic leads-through-hole.png|thumb|none|100px|DIP Through-Hole ]]
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* Land pad (Non-leaded/No-lead)
  
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|-
⚫
* Pin
  
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| [[Image:Ic_leads-exposed_pad.png|thumb|none|100px|Exposed Pad]]
⚫
* Column
  
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| [[Image:Ic leads-solder ball.png|thumb|none|100px|Ball (solder ball)]]
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| [[Image:Ic leads-Heat-tab.jpg|thumb|none|100px|Tab (Heatsink)]]
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|-
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| [[Image:Ic leads-pad.png|thumb|none|100px|Land pad (Non-leaded/No-lead)]]
  ⚫
| PGA Pin
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| Column
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|}
   
 
=Common Packages=
  
=Common Packages=
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* CPGA: Ceramic pin grid array
  
* CPGA: Ceramic pin grid array
 
* PDIP: Plastic dual in-line package
  
* PDIP: Plastic dual in-line package
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* BGA : Ball grid array
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* BGA : Ball grid array
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* SO: Small outline
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* SO: Small outline
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** SOIC: Small outline intergrated circuit
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** SOIC: Small outline integrated circuit
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** SOT-23: Small outline transistor 23
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** SOT: Small outline transistor
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** SOJ: Small outline J-lead
 
* PQFP: Plastic quad flat package
  
* PQFP: Plastic quad flat package
 
* PLCC: plastic leaded chip carrier
  
* PLCC: plastic leaded chip carrier
 
* TO: transistor outline
  
* TO: transistor outline
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=Chip packages=
  
=Chip packages=
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*[[Howto identify chip packages/Pin grid array|Pin grid array]]
  
*[[Howto identify chip packages/Pin grid array|Pin grid array]]
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* PGA
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** PGA
   
 
*[[Howto identify chip packages/Small outline package|Small outline package]]:
  
*[[Howto identify chip packages/Small outline package|Small outline package]]:
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*[[Howto identify chip packages/Quad package|Quad package]]
  
*[[Howto identify chip packages/Quad package|Quad package]]
 
**QFP
  
**QFP
  +
**HQFP
   
 
*[[Howto identify chip packages/Leadless package|Leadless package]]
  
*[[Howto identify chip packages/Leadless package|Leadless package]]
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*[[Howto identify chip packages/Unsorted|Unsorted]]
  
*[[Howto identify chip packages/Unsorted|Unsorted]]
   
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''See all chip package images: [[:Category:Chip package image]]''
   
 
=Chip Carrier Related Acronyms=
  
=Chip Carrier Related Acronyms=
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* COL: Chip-on-Lead
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* COL: Chip-on-Lead
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* TEP: Top Exposed Pad
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* TEP: Top Exposed Pad
 
* EP, EXP: Exposed pad
  
* EP, EXP: Exposed pad
 
* L, LD: Lead
  
* L, LD: Lead
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* SiP: System in Package
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* SiP: System in Package
 
* JEDEC: Joint Electron Device Engineering Council
  
* JEDEC: Joint Electron Device Engineering Council
 
* JEITA: Japan Electronics and Information Technology Industries Association
  
* JEITA: Japan Electronics and Information Technology Industries Association
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* Sn: tin
  
* Sn: tin
 
* Cu: Copper
  
* Cu: Copper
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* Ag: Gold
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* Au: Gold
 
* EIA: Electronic Industries Alliance
  
* EIA: Electronic Industries Alliance
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* MCP: Mult-Chip Package
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* MCP: Multi-Chip Package
 
* EIAJ: Electronic Industries Association of Japan
  
* EIAJ: Electronic Industries Association of Japan
 
* TAB: Tape Automated Bonding
  
* TAB: Tape Automated Bonding
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=See Also=
  
=See Also=
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* [http://tsc.jeita.or.jp/tsc/standard/downloadE.html JEITA package standards downloads]
  
* [http://tsc.jeita.or.jp/tsc/standard/downloadE.html JEITA package standards downloads]
 
* http://www.standardics.nxp.com/packaging/package.outlines/
  
* http://www.standardics.nxp.com/packaging/package.outlines/
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*http://www.nxp.com/package/
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* http://www.nxp.com/package/
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* http://www.analog.com/Analog_Root/Packages/Packages_Home/0,2299,1,00.html
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* http://www.analog.com/en/corporate/quality-and-reliability/packages/index.html
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*
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* *http://www.amkor.com/products/productfamilies.cfm
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*http://www.amkor.com/products/productfamilies.cfm
   
 
* http://acronyms.thefreedictionary.com/
  
* http://acronyms.thefreedictionary.com/
   
 
=New links=
  
=New links=
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*http://www.talkingelectronics.com/projects/CircuitTricks/CircuitTricks-1.html
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*[http://www.talkingelectronics.com/projects/CircuitTricks/CircuitTricks-1.html some chip package desc]
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* GOOD: http://icmaster.co.kr/Semi/hitachi/pdf/pkg.pdf
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* GOOD: [http://ww1.microchip.com/downloads/en/EnvironmentalInformation/en026304.pdf]
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* [http://sti-lt.ac-rouen.fr/Microtechniques/BTS_CIM/Articles/Doc%20Microship.pdf]
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* GOOD: http://ww1.microchip.com/downloads/en/EnvironmentalInformation/en026304.pdf
  
  ⚫
* ALL ee words: [http://cpu.linuxmania.net/liste/cpuinfo/chip-abbreviations.htm chip-abbreviations]
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* http://sti-lt.ac-rouen.fr/Microtechniques/BTS_CIM/Articles/Doc%20Microship.pdf
  
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* [http://productsearch.machinedesign.com/Specifications/Semiconductors/Discrete/Thyristors/Silicon_Controlled_Rectifiers_SCR package names]
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* ALL ee words: http://cpu.linuxmania.net/liste/cpuinfo/chip-abbreviations.htm
  
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* http://productsearch.machinedesign.com/Specifications/Semiconductors/Discrete/Thyristors/Silicon_Controlled_Rectifiers_SCR
  
   
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* [http://www.napakgd.com/previous/kgd2001/pdf/6-2_Chen.pdf Package in package]
   
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*[http://www.statschippac.com/en-US/STATSChipPAC/IntegratedServices/Packaging/LeadFrame/bcc.htm Bumped Chip Carrier (BCC)]
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*http://www.statschippac.com/en-US/STATSChipPAC/IntegratedServices/Packaging/LeadFrame/bcc.htm
  
   
 
*http://www.educypedia.be/electronics/componentfabricationchip.htm
  
*http://www.educypedia.be/electronics/componentfabricationchip.htm
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*[http://www.rohm.com/products/databook/pack/pdf/index-e.html ROHM]
  
*[http://www.rohm.com/products/databook/pack/pdf/index-e.html ROHM]
 
* [http://www.sony.co.jp/~semicon/PKG/english/ic.html Sony]
  
* [http://www.sony.co.jp/~semicon/PKG/english/ic.html Sony]
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*[http://www.ti.com/sc/docs/package/guide.htm TI- long list of names]
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* [http://www.pcmag.com/encyclopedia_term/0,2542,t=chip+package&i=39645,00.asp some names]
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*[http://www.toplinecomponents.com/SMDnomen.pdf SMD components]
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* http://www.fpga-guide.com/package/package.html
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* [http://www.google.com/search?hl=en&client=firefox-a&rls=org.mozilla%3Aen-US%3Aofficial&hs=hLz&q=tsqfp+pdf&btnG=Search SMD Dictionary]
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* [http://www.esilicon.com/capabs/capPakBGA.htm BGA Packages]
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* [http://www.2ic.cn/bbs/viewthread.php?tid=287902 very long list of names]
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* [http://www.upv.es/amiga/198.htm list of names] (Spanish)
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* [http://www.toshiba.com/taec/components/Generic/LSIpack.pdf BGA side profiles]
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* [http://www.engr.sjsu.edu/mjones/LSIpack.pdf BGA side profiles]
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* [http://www.esilicon.com/capabs/capPakBGA.htm BGA side profiles]
   
 
=completed=
  
=completed=
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*http://www.analog.com/Analog_Root/Packages/Packages_Home/0,2299,1,00.html
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* [http://www.analog.com/Analog_Root/Packages/Packages_Home/0,2299,1,00.html Analog devices]
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*http://www.amkor.com/products/productfamilies.cfm
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* [http://www.amkor.com/ Amkor Technology]
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*http://www.fairchildsemi.com/packaging/
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* [http://www.fairchildsemi.com/packaging/ Fairchild]
   
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*''[[Howto identify chip packages/old|old packages]]''
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*''[[Howto identify chip packages/old|old packages]]''<div id="wikia-credits"><br /><br /><small>From [http://howto.wikia.com HowTo Wiki], a [http://www.wikia.com Wikia] wiki.</small></div>
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[[Category:Howto]]
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[[Category:Electronics]]

Latest revision as of 09:39, 28 April 2015

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A chip package is what surrounds the integrated circuit die and connects the die's pads to the packages external pins. They are often a chip carriers, or IC packages.



Types of Leads/Contacts

The pieces of metal that electrically connect the IC to a circuit board are called leads.

Ic leads-j-lead

J-Lead
Ic leads-gull wing

Gull-wing
Ic leads-c lead

C-Bend

Ic leads-i lead

I-Lead
Ic leads-batwing

Bat-wing
Ic leads-through-hole

DIP Through-Hole

Ic leads-exposed pad

Exposed Pad
Ic leads-solder ball

Ball (solder ball)
Ic leads-Heat-tab

Tab (Heatsink)

Ic leads-pad

Land pad (Non-leaded/No-lead)

 PGA Pin Column

Common Packages

  • CPGA: Ceramic pin grid array
  • PDIP: Plastic dual in-line package
  • BGA : Ball grid array
  • SO: Small outline
    • SOIC: Small outline integrated circuit
    • SOT: Small outline transistor
    • SOJ: Small outline J-lead
  • PQFP: Plastic quad flat package
  • PLCC: plastic leaded chip carrier
  • TO: transistor outline

Chip packages



See all chip package images: Category:Chip package image

Chip Carrier Related Acronyms

  • COL: Chip-on-Lead
  • TEP: Top Exposed Pad
  • EP, EXP: Exposed pad
  • L, LD: Lead
  • SiP: System in Package
  • JEDEC: Joint Electron Device Engineering Council
  • JEITA: Japan Electronics and Information Technology Industries Association
  • SoC: System on Chip
  • ASIC: Application specific Integrated circuit
  • Pb: lead
  • Sn: tin
  • Cu: Copper
  • Au: Gold
  • EIA: Electronic Industries Alliance
  • MCP: Multi-Chip Package
  • EIAJ: Electronic Industries Association of Japan
  • TAB: Tape Automated Bonding

See Also

External Links

New links

completed

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