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This page contains all computer chip or integrated circuit packages. A chip package is what surrounds the integrated circuit die and connects the die's pads to the packages external pins.



Types of Leads/Contacts

  • J-Lead
  • Gull-wing Lead
  • C-Bend Lead
  • I-Lead
  • Bat-wing Lead
  • Through-Hole Lead
  • Exposed Pad
  • Ball (solder ball)
  • Tab (Heatsink)
  • Land pad (Non-leaded/No-lead)
  • Pin
  • Column

Common Packages

  • CPGA: Ceramic pin grid array
  • PDIP: Plastic dual in-line package
  • BGA : Ball grid array
  • SO: Small outline
    • SOIC: Small outline intergrated circuit
    • SOT-23: Small outline transistor 23
  • PQFP: Plastic quad flat package
  • PLCC: plastic leaded chip carrier
  • TO: transistor outline



Chip packages




Chip Carrier Related Acronyms

  • COL: Chip-on-Lead
  • TEP: Top Exposed Pad
  • EP, EXP: Exposed pad
  • L, LD: Lead
  • SiP: System in Package
  • JEDEC: Joint Electron Device Engineering Council
  • JEITA: Japan Electronics and Information Technology Industries Association
  • SoC: System on Chip
  • ASIC: Application specific Integrated circuit
  • Pb: lead
  • Sn: tin
  • Cu: Copper
  • Ag: Gold
  • EIA: Electronic Industries Alliance
  • MCP: Mult-Chip Package
  • EIAJ: Electronic Industries Association of Japan
  • TAB: Tape Automated Bonding


See Also

External Links

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